1.Outline of the Facilities Within the Department
The Department has a large number of workstations, mainly Sun 3 and Sun 4 series machines, along with Hewlett Packard workstations, DecStations and TVhaexySatalltiorunns. variants of the Unix operating system (SunOS, 4.3 Utah and Ultrix), and are all connected via a series of ethemets. Several machines are configured as fileservers.
2.Use of Different Tool
Within the Computer Science Department at UCL, many different tools are used through the VLSI desig process. These typically range from silicon layout editors, schematic capture tools and logic generators to logic optimisers and digital simulators. Whilst not every tool may be used in the creation of every design, it is likely that a large subset will, and it is the combination of these tools which causes a large number of problems.
These are listed below:
(i) A given tool may well be restricted to running on one machine architecture: another tool might onlyrun on a different machine. This means that the designer must log in to the correct machine at each stage, before running the associated tool. There may also be problems accessing the correct files from different machines: not all machines have access to all filestores.
(ii) As a design is processed, it must be passed from tool to tool. For example, the designer may use a schematic capture tool for initial input, then wish for their design to be minimised, and finally simulated. However. nearly every tool expects its input and produces its output in a unique format. Whilst many tools include options to read and write files in different formats, there is rarely one which is common to them all. This makes the passing of design data from one tool to the next very tedious and error prone; generally some form of file format conversion must be done at each stage.
(iii) Each tool must be invoked manually: it is therefore quite easy for human error to creep in. This may take the form of a forgotten flag (perhaps with minor side-effects),but at the other extreme, it is quite easy (in Unix) to overwrite the source file with a mis-typed file redirection command. Of course, it is quite possible that the designer will forget to run the design through a certain tool altogether - a logic minimiser for example.
(iv) Many of the tools used in the Department take a long time to run when the design is complicated - typically, a simulation of a large processor may be left running overnight. Some of these tools also have a tendency to crash, which often results in the loss of work. Of course, if the simulation which is left running overnight crashes, then it too is lost. Each tool must be invoked manually: it is therefore quite easy for human error to creep in. This may take the form of a forgotten flag (perhaps with minor side-effects),but at the other extreme, it is quite easy (in Unix) to overwrite the source file with a mis-typed file redirection command. Of course, it is quite possible that the designer will forget to run the design through a certain tool altogether - a logic minimiser for example.
(iv) Many of the tools used in the Department take a long time to run when the design is complicated - typically, a simulation of a large processor may be left running overnight. Some of these tools also have a tendency to crash, which often results in the loss of work. Of course, if the simulation which is left running overnight crashes, then it too is lost.
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The Department has a large number of workstations, mainly Sun 3 and Sun 4 series machines, along with Hewlett Packard workstations, DecStations and TVhaexySatalltiorunns. variants of the Unix operating system (SunOS, 4.3 Utah and Ultrix), and are all connected via a series of ethemets. Several machines are configured as fileservers.
Within the Computer Science Department at UCL, many different tools are used through the VLSI desig process. These typically range from silicon layout editors, schematic capture tools and logic generators to logic optimisers and digital simulators. Whilst not every tool may be used in the creation of every design, it is likely that a large subset will, and it is the combination of these tools which causes a large number of problems.
These are listed below:
(i) A given tool may well be restricted to running on one machine architecture: another tool might onlyrun on a different machine. This means that the designer must log in to the correct machine at each stage, before running the associated tool. There may also be problems accessing the correct files from different machines: not all machines have access to all filestores.
(ii) As a design is processed, it must be passed from tool to tool. For example, the designer may use a schematic capture tool for initial input, then wish for their design to be minimised, and finally simulated. However. nearly every tool expects its input and produces its output in a unique format. Whilst many tools include options to read and write files in different formats, there is rarely one which is common to them all. This makes the passing of design data from one tool to the next very tedious and error prone; generally some form of file format conversion must be done at each stage.
(iii) Each tool must be invoked manually: it is therefore quite easy for human error to creep in. This may take the form of a forgotten flag (perhaps with minor side-effects),but at the other extreme, it is quite easy (in Unix) to overwrite the source file with a mis-typed file redirection command. Of course, it is quite possible that the designer will forget to run the design through a certain tool altogether - a logic minimiser for example.
(iv) Many of the tools used in the Department take a long time to run when the design is complicated - typically, a simulation of a large processor may be left running overnight. Some of these tools also have a tendency to crash, which often results in the loss of work. Of course, if the simulation which is left running overnight crashes, then it too is lost. Each tool must be invoked manually: it is therefore quite easy for human error to creep in. This may take the form of a forgotten flag (perhaps with minor side-effects),but at the other extreme, it is quite easy (in Unix) to overwrite the source file with a mis-typed file redirection command. Of course, it is quite possible that the designer will forget to run the design through a certain tool altogether - a logic minimiser for example.
(iv) Many of the tools used in the Department take a long time to run when the design is complicated - typically, a simulation of a large processor may be left running overnight. Some of these tools also have a tendency to crash, which often results in the loss of work. Of course, if the simulation which is left running overnight crashes, then it too is lost.
For visits:
Dft training institutes in bangalore,asic verification training in bangalore,system verilog training in bangalore,VLSI Training in Bangalore
